1. Field of the Invention
The present invention is related to the structure of a solder mask for the circuit module of BGA substrate and more particularly to the openings in the structure of the solder mask for the electronic devices between the power ring and ground ring or between two through-holes.
2. Description of the Related Art
An integrated circuit needs power to operate and it has a plurality of wires connecting the power to the I/O ports of the integrated circuit. The wires themselves are the source of electromagnetic interference, especially when the integrated circuit transmits at high frequency. The wires of the integrated circuit emit electromagnetic interference which influences the normal operation of the integrated circuit. A capacitor is electrically connected to the wires and can reduce the electromagnetic interference of the wires.
U.S. Pat. No. 5,906,700, issued on May 25, 1999 to Furukawa et al., discloses a method of manufacturing a circuit module, as shown in FIG. 1. A substrate 100 has a chip 101 and a plurality of electronic parts 102, and an encapsulant 103 encapsulates the chip 101 and a portion of the electronic parts 102. However, the dimensions of the surface of the substrate 100 are limited around the periphery of the chip 101, and the electronic parts 102 must therefore be placed in an area farther away from the chip 101 on the substrate 100 due to the arrangement of the traces electrically connecting to the wires. Therefore, U.S. Pat. No. 5,906,700 fails to meet the requirement that the electronic parts 102 be arranged close to the chip 101 and necessitates rearrangement or addition of more traces, which complicates the process.
U.S. Pat. No. 5,825,628, issued on Oct. 20, 1998 to Garbelli et al., discloses an electronic package, as shown in FIG. 2. A substrate 200 is a multi-layer PCB and includes a power layer 201 connecting to a hole 202 and a ground layer 203 connecting to a hole 204. A chip 210 is adhesively attached to the substrate 200 and is enclosed by an encapsulant 211. An electronic part connects the hole 202 to the hole 204 for reduction of electromagnetic interference. The electronic part has a defined longitudinal distance but U.S. Pat. No. 5,825,628 must leave an area on its surface for the arrangement of a hole 202 to connect to the power layer 201 and the hole 204 to the ground layer 203. Because U.S. Pat. No. 5,825,628 must save a particular area for this electronic part, and further necessitates the manufacture of a new hole 202 to connect to the power layer 201 and a new hole 204 to connect to the ground layer 203 in this area. Thus the substrate 200 of U.S. Pat. No. 5,825,628 increases the complexity of the hole and the manufacture of traces. It also increases the limitation of the dimensions of substrate so that U.S. Pat. No. 5,825,628 fails to meet the requirement that the electronic part be close to the chip. The method of providing holes in substrate 200 is adapted to a multi-layer PCB, and the method of proving a hole to connect to the power layer or the ground layer cannot be applied to the dual-layer PCB without leaving space for the arrangement of the power layer or the ground layer.
The present invention intends to provide the structure of a solder mask for the circuit module of a BGA substrate with openings provided on the power ring, the ground ring and the original holes in such a way as to mitigate and overcome the above problem. Therefore, the openings are provided for the arrangement of the electronic part on the original holes and traces to reduce the density of the traces of the substrate.